www.linux-nis.org (NIS Server and Tools)

www.linux-nis.org (NIS Server and Tools): "The Network Information Service (NIS) provides a simple network lookup service consisting of databases and processes.

At first you need to define the NIS master server which contains all source files for the various maps like /etc/passwd, /etc/group or /etc/hosts. The NIS server process ypserv needs to be run on this host. The ypserv daemon is typically activated at system startup. There could be more hosts running ypserv, this one are called 'slaves'. They get their maps from the master server. If a slave goes down, it will miss updates from the master.

On other machines using the NIS services as client, you have to run ypbind. ypbind must run on every machine which has NIS client processes; ypserv may or may not be running on the same node, but must be running somewhere on the network. For normal users, you need the yp-tools. This package provide tools for communication with ypbind, ypset and ypwhich, tools for accessing the NIS maps, ypcat, ypmatch and yppoll, and tools for changing NIS user information, ypchfn, ypchsh and yppasswd.

The ypserv package implements fully NIS master/slave support and is compatible to the version from SUN. The YP V2 protocol is complete implemented, YP V1 only partially. ypbind-mt implements a multi-threaded ypbind daemon, which is compatible to the SUN ypbind protocol version 1 and 2. Version 3 is not supported, since the protocol is not publically available. The yp-tools supports only the YP and ypbind protocol version 2."

Google Search: define: daemon

Google Search: define: daemon: "Definitions of daemon on the Web:

* A daemon is a program that runs, without human intervention, to accomplish a given task. For example, lpd is a daemon that controls the flow of print jobs to a printer.
www.redhat.com/docs/manuals/linux/RHL-6.2-Manual/getting-started-guide/ch-glossary.html

* A program that runs in the background; that is, without user interaction.
www.oreilly.com/catalog/debian/chapter/book/glossary.html

* A program that runs unattended to perform continuous or periodic systemwide functions, such as network control.
www.sabc.co.za/manual/ibm/9agloss.htm"

Write-invalidate vs Write-update CC protocols

Automatic Verification of Parameterized Cache Coherence Protocols: "In a shared-memory multiprocessor system local caches are used to reduce memory access latency and network traffic. Each processor is connected to a fast memory `backed up' by a large (and slower) main memory. This configuration enables processors to work on local copies of main memory blocks, greatly reducing the number of memory accesses that the processor must perform during program execution. Although local caches improve system performance, they introduce the cache coherence problem: multiple cached copies of the same block of memory must be consistent at any time during a run of the system.

A cache coherence protocol ensure the data consistency of the system: the value returned by a read must be always the last value written to that location (cf. [AB86,Han93]). Coherence policies are typically described as finite state machines that specify the way a single cache reacts to events like read and write requests. As an example, let us consider a CC-UMA (Uniform-Memory-Access with local Caches model) multiprocessor system, i.e., a system in which all processors have a local cache connected to the main memory via a shared bus. In write-invalidate protocols whenever a processor modifies its cache block a bus invalidation signal is sent to all other caches in order to invalidate their content. In write-update protocols, instead, a copy of the new data is sent to all caches that share the old data."

Symmetrical Multi-Processing

Symmetrical Multi-Processing: "One of the easiest and cheapest ways to improve hardware performance is to put more than one CPU on the board. This can be done either making the different CPU's take on different jobs (asymmetrical multi-processing) or by making them all run in parallel, doing the same job (symmetrical multi-processing, a.k.a. SMP). Doing asymmetrical multi-processing effectively requires specialized knowledge about the tasks the computer should do, which is unavailable in a general purpose operating system such as Linux. On the other hand, symmetrical multi-processing is relatively easy to implement.

By relatively easy, I mean exactly that: not that it's really easy. In a symmetrical multi-processing environment, the CPU's share the same memory, and as a result code running in one CPU can affect the memory used by another. You can no longer be certain that a variable you've set to a certain value in the previous line still has that value; the other CPU might have played with it while you weren't looking. Obviously, it's impossible to program like this.

"

System Verilog - static vs automatic variables

A variable can be static (storage allocated on instantiation and never de-allocated) or automatic (stack storage
allocated on entry to a scope (such as a task, function or block) and de-allocated on exit). C has the keywords
static and auto. SystemVerilog follows Verilog in respect of the static default storage class, with automatic
tasks and functions, but allows static to override a default of automatic for a particular variable in such
tasks and functions.

Reasons for System Verilog logic and reg types

Verification Guild: "logic is identical to reg
I'm trying to determine what the intent was regarding the definition of logic-type variables compared to reg-type variables in System Verilog. I have not found anything definite in the more recent LRMs that indicate any difference at all -- they are both simply 4-state variables. Are there any cases laid out by the LRM where a logic variable is allowed but a reg-type is not (and vise versa)? We have come up with some of our own ideas regarding how they could be used to help imply design intent (combinational vs. synchronous variables, for example) but nothing that would be enforced by a compiler/parser.

I believe "logic" was added to remove the reg/wire duality. i..e. a variable declared as type logic can be assigned to procedurally OR with a continous assignment (not both). So logic is now your universal four state type. No more rules on whether a variable needs to be declared as wire, or reg - just use logic.

The logic type is UNRESOLVED - meaning there's no support for multiple drivers. 99% of the time this is a don't care since on todays SOCs in sub 0.25 um technology, there aren't any internal tri-states anyway. You'll really only need to use those wires along the periphery of the chip where there are true multi-driver nets.

A lot of new users assume reg will infer a hardware register. In fact, reg is a generic storage type that can be a register or combinational logic. So the logic type name was kept to eliminate the ambiguity. While the names are completely interchangeable, I expect the experts will encourage us all to use logic instead or reg from now on."

[Furled]